Fast Modular Multiplication using Parallel Prefix Adder

Mrs. P. Navitha; Mrs. D. Mamatha; Sanduri Akshitha

Title:
Fast Modular Multiplication using Parallel Prefix Adder

Authors:
Sanduri Akshitha | Mrs. P. Navitha | Mrs. D. Mamatha
DOI:
https://doi.org/10.31142/ijtsrd18170

Cite This Article :

Sanduri Akshitha | Mrs. P. Navitha | Mrs. D. Mamatha "Fast Modular Multiplication using Parallel Prefix Adder" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-2 | Issue-5, August 2018, pp.1770-1774, URL: https://www.ijtsrd.com/papers/ijtsrd18170.pdf

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Abstract :
Public key cryptography applications involve use of large integer arithmetic operations which are compute intensive in term of power, delay and area. Modular multiplication, which is frequently, used most resource hungry block. Generally, last stage of modular multiplication is implemented by using carry propagate adder whose long carry chain takes more time. In this paper, modulo multiplication architectures using Carry Save and Kogge-Stone parallel prefix adder are presented to reduce this problem. Proposed implementations are faster as compared to conventional carry save adder and carry propagate adder implementations.

Keywords :
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Publication Details:

Unique Identification Number : IJTSRD18170

Published In : Volume-2 | Issue-5, August 2018

Page Number(s) : 1770-1774

Publisher Name : IJTSRD | www.ijtsrd.com | E-ISSN 2456-6470

Copyright © 2019 by author(s) and International Journal of Trend in Scientific Research and Development Journal. This is an Open Access article distributed under the terms of the Creative Commons Attribution License (CC BY 4.0) (http://creativecommons.org/licenses/by/4.0)

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