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Analysis of Hardware Security to Prevent the Scan Based Attacks by using Sticky Counter

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Analysis of Hardware Security to Prevent the Scan Based Attacks by using Sticky Counter


Rangu Lavanya | Dr. G. Shanmugapriya | Mr. S. Gopala Krishna

https://doi.org/10.31142/ijtsrd11335



Rangu Lavanya | Dr. G. Shanmugapriya | Mr. S. Gopala Krishna "Analysis of Hardware Security to Prevent the Scan Based Attacks by using Sticky Counter" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-2 | Issue-3, April 2018, pp.1266-1278, URL: https://www.ijtsrd.com/papers/ijtsrd11335.pdf

Security of integrated circuits (ICs) has emerged as a major concern at different stages of IC life-cycle, spanning design, test, fabrication and deployment. Modern ICs are becoming increasingly vulnerable to various forms of security threats, such as: 1) illegaluse of hardware intellectual property (IP) \IP Piracy. 2) Illegal manufacturing of IC\ IC Piracy. Designing of confidential ICs must satisfy many design rules in order to rectify the various attacks and to protect the secret data. Based on the concept of withholding information, on-chip comparisons for actual and expected response. Obfuscation method to prevent the piracy overbuilding and reverse engineering RE. But no security against scan based attackers. This practical logic obfuscation applicable for combinational circuits and will not protect the scan attacks. In order overcome this drawback the recent works on hardware security to prevent piracy. From the security point of view, few limitations of existing method limit the security level. Some countermeasures have been proposed in order to secure the scan technique and on-chip comparison. This method can be applicable for both sequential, combinational circuits. This proposed method can be applied for all scan testing. We implement the project using Xilinx ISE tool for Simulation and synthesis and the code is written in Verilog HDL.

Hardware security logic obfuscation, Flipped Scan Chain, On-Chip Scan Chain Comparison, AES


IJTSRD11335
Volume-2 | Issue-3, April 2018
1266-1278
IJTSRD | www.ijtsrd.com | E-ISSN 2456-6470
Copyright © 2019 by author(s) and International Journal of Trend in Scientific Research and Development Journal. This is an Open Access article distributed under the terms of the Creative Commons Attribution License (CC BY 4.0) (http://creativecommons.org/licenses/by/4.0)

International Journal of Trend in Scientific Research and Development - IJTSRD having online ISSN 2456-6470. IJTSRD is a leading Open Access, Peer-Reviewed International Journal which provides rapid publication of your research articles and aims to promote the theory and practice along with knowledge sharing between researchers, developers, engineers, students, and practitioners working in and around the world in many areas like Sciences, Technology, Innovation, Engineering, Agriculture, Management and many more and it is recommended by all Universities, review articles and short communications in all subjects. IJTSRD running an International Journal who are proving quality publication of peer reviewed and refereed international journals from diverse fields that emphasizes new research, development and their applications. IJTSRD provides an online access to exchange your research work, technical notes & surveying results among professionals throughout the world in e-journals. IJTSRD is a fastest growing and dynamic professional organization. The aim of this organization is to provide access not only to world class research resources, but through its professionals aim to bring in a significant transformation in the real of open access journals and online publishing.

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